Kamsu-Foguem, Bernard and Simeu, Emmanuel Optimizing construction of scheduled data flow graph for on-line testability. (2012) The Mediterranean Journal of Computers and Networks, 8 (4). 125-133. ISSN 1744-2397
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Abstract
The objective of this work is to develop a new methodology for behavioural synthesis using a flow of synthesis, better suited to the scheduling of independent calculations and non-concurrent online testing. The traditional behavioural synthesis process can be defined as the compilation of an algorithmic specification into an architecture composed of a data path and a controller. This stream of synthesis generally involves scheduling, resource allocation, generation of the data path and controller synthesis. Experiments showed that optimization started at the high level synthesis improves the performance of the result, yet the current tools do not offer synthesis optimizations that from the RTL level. This justifies the development of an optimization methodology which takes effect from the behavioural specification and accompanying the synthesis process in its various stages. In this paper we propose the use of algebraic properties (commutativity, associativity and distributivity) to transform readable mathematical formulas of algorithmic specifications into mathematical formulas evaluated efficiently. This will effectively reduce the execution time of scheduling calculations and increase the possibilities of testability.
Item Type: | Article |
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Audience (journal): | International peer-reviewed journal |
Uncontrolled Keywords: | |
Institution: | French research institutions > Centre National de la Recherche Scientifique - CNRS (FRANCE) Université de Toulouse > Institut National Polytechnique de Toulouse - Toulouse INP (FRANCE) Other partners > Institut polytechnique de Grenoble (FRANCE) Other partners > Université Joseph Fourier Grenoble 1 - UJF (FRANCE) |
Laboratory name: | Laboratoire Génie de Production - LGP (Tarbes, France) - Systèmes Décisionnels et Cognitifs - SDC Techniques de l'informatique et de la microélectronique pour l'architecture des systèmes intégrés - TIMA (Grenoble, France) - Reliable Mixed-signal Systems - RMS |
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Deposited On: | 14 Jan 2013 15:06 |
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