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Heterogeneous multicore SDRAM interference analysis

Mascareñas González, Alfonso and Boniol, Frédéric and Bouchebaba, Youcef and Bussenot, Jean-Loup and Chaudron, Jean-Baptiste Heterogeneous multicore SDRAM interference analysis. (2021) In: The 29th International Conference on Real-Time Networks and Systems (RTNS '21), 7 April 2021 - 21 April 2021 (Virtual event, France).

(Document in English)

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Official URL: https://doi.org/10.1145/3453417.3453426


The purpose of this paper is to describe a set of DDR3 SDRAM interference estimation cost functions. The arbitration system of the SDRAM controller heavily impact the interference analysis. In this work, three arbitration are considered, corresponding to the situations where the accessed memory address belongs to the same block address, different memory banks and different rows. The aim of these functions is to estimate the instructions interference overhead may suffer when concurrently accessing these three logical addresses in a SDRAM saturation context. To develop these interference expressions, specific measurement systems, micro-benchmarks and theory on SDRAM controllers have been used.

Item Type:Conference or Workshop Item (Paper)
Additional Information:ISBN : 978-1-4503-9001-9
HAL Id:hal-03383504
Audience (conference):International conference proceedings
Uncontrolled Keywords:
Institution:Université de Toulouse > Institut Supérieur de l'Aéronautique et de l'Espace - ISAE-SUPAERO (FRANCE)
French research institutions > Office National d'Etudes et Recherches Aérospatiales - ONERA (FRANCE)
Laboratory name:
Deposited On:18 Oct 2021 13:53

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