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Design Impact on Charge Transfer Inefficiency of Surface CCD on CMOS Devices: TCAD and Characterization Study

Marcelot, Olivier and Molina, Romain and Bouhier, Matthieu and Magnan, Pierre Design Impact on Charge Transfer Inefficiency of Surface CCD on CMOS Devices: TCAD and Characterization Study. (2016) IEEE Transactions on Electron Devices, 63 (3). 1099-1104. ISSN 0018-9383

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Official URL: http://doi.org/10.1109/TED.2016.2516045


This work presents a study of design optimization of CCD on CMOS devices, in order to minimize the Charge Transfer Inefficiency (CTI). To achieve this goal, 3D Technology Computer Aided Design (TCAD) simulations with a trap model at silicon–oxide interface were conducted, and measurements on two test chips manufactured on two different foundries were performed. TCAD simulations predict trends in agreement with measurements, but trap models at STI and gate oxides should be adapted accordingly to the technology used. Some design variations show results depending on the technology chosen, and the best CTI reduction is obtained with an increase of Pwell inclusion over STI edges.

Item Type:Article
Additional Information:Thanks to the IEEE (Institute of Electrical and Electronics Engineers). This paper is available at : https://ieeexplore.ieee.org/document/7390049 “© 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Audience (journal):International peer-reviewed journal
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Institution:Université de Toulouse > Institut Supérieur de l'Aéronautique et de l'Espace - ISAE-SUPAERO (FRANCE)
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Deposited On:28 Jan 2019 13:58

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