Ermont, Jérôme and Fraboul, Christian Computing the exact worst-case End-to-end delays in a Spacewire network using Timed Automata. (2013) In: 19th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2013), 9 April 2013 - 11 April 2013 (Philadelphie, PA, United States).
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(Document in English)
PDF (Author's version) - Requires a PDF viewer such as GSview, Xpdf or Adobe Acrobat Reader 135kB |
Official URL: http://www.cister.isep.ipp.pt/rtas2013/WiP_Proceedings.pdf
Abstract
Spacewire is a real-time communication network for use onboard satellites. It has been designed to transmit both payload and control/command data. To guarantee that communications respect the real-time constraints, designers use tools to compute the worst-case end-to-end delays. Among these tools, recursive flow analysis and Network Calculus approaches have been studied. This paper proposes to use the model-checking approach based on timed automata to compute the exact worstcase end-to-end delays and two case studies are presented.
Item Type: | Conference or Workshop Item (Paper) |
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Additional Information: | Thanks to IEEE editor. The original PDF of the article can be found at : http://www.cister.isep.ipp.pt/rtas2013/WiP_Proceedings.pdf |
HAL Id: | hal-01228709 |
Audience (conference): | National conference proceedings |
Uncontrolled Keywords: | |
Institution: | Université de Toulouse > Institut National Polytechnique de Toulouse - Toulouse INP (FRANCE) French research institutions > Centre National de la Recherche Scientifique - CNRS (FRANCE) Université de Toulouse > Université Toulouse III - Paul Sabatier - UT3 (FRANCE) Université de Toulouse > Université Toulouse - Jean Jaurès - UT2J (FRANCE) Université de Toulouse > Université Toulouse 1 Capitole - UT1 (FRANCE) |
Laboratory name: | |
Statistics: | download |
Deposited On: | 19 Oct 2015 08:38 |
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