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Test Sequence Generation From Formally Verified SysML Models

Saqui-Sannes, Pierre de and Apvrille, Ludovic Test Sequence Generation From Formally Verified SysML Models. (2019) In: 1st Workshop on Software Engineering for Avionics System (Aviose 2019), 18 February 2019 - 18 February 2019 (Stuttgart, Germany).

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Official URL: http://ceur-ws.org/Vol-2308/aviose2019paper02.pdf

Abstract

est generation has been acknowledged as a cost-prone activity reducing productivity and time to market. Theexpected benefits of Model Based Systems Engineering includeautomated generation of test sequences from models. The paperproposes verification solutions for the System Modeling Lan-guage (SysML). In particular, the paper shows how to linktest generation to formal verification. The proposed algorithmsare implemented by the free software TTool. Two case studiessupport discussion on conformance and interoperability testing,respectively.

Item Type:Conference or Workshop Item (Paper)
Audience (conference):International conference proceedings
Uncontrolled Keywords:
Institution:Université de Toulouse > Institut Supérieur de l'Aéronautique et de l'Espace - ISAE-SUPAERO (FRANCE)
Other partners > Telecom ParisTech (FRANCE)
Laboratory name:
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Deposited By: Pierre de Saqui-Sannes
Deposited On:20 Feb 2019 13:46

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