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Static Probabilistic Timing Analysis in Presence of Faults

Chen, Chao and Santinelli, Luca and Hugues, Jérôme and Beltrame, Giovanni Static Probabilistic Timing Analysis in Presence of Faults. (2016) In: 11th IEEE International Symposium on Industrial Embedded Systems, 23 May 2016 - 25 May 2016 (Krakow, Poland).

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Official URL: http://dx.doi.org/10.1109/SIES.2016.7509422

Abstract

Accurate timing prediction for software execution is becoming a problem due to the increasing complexity of computer architecture, and the presence of mixed-criticality workloads. Probabilistic caches were proposed to set bounds to Worst Case Execution Time (WCET) estimates and help designers improve system resource usage. However, as technology scales down, system fault rates increase and timing behavior is affected. In this paper, we propose a Static Probabilistic Timing Analysis (SPTA) approach for caches with evict-on-miss random replacement policy using a state space modeling technique, with consideration of fault impacts on both timing analysis and task WCET. Different scenarios of transient and permanent faults are investigated. Results show that our proposed approach provides tight probabilistic WCET (pWCET) estimates and as fault rate increases, the timing behavior of the system can be affected significantly.

Item Type:Conference or Workshop Item (Paper)
Additional Information:Electronic ISBN : 978-1-5090-2282-3
Audience (conference):International conference proceedings
Uncontrolled Keywords:
Institution:Université de Toulouse > Institut Supérieur de l'Aéronautique et de l'Espace - ISAE-SUPAERO (FRANCE)
French research institutions > Office National d'Etudes et Recherches Aérospatiales - ONERA (FRANCE)
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Deposited By: Jerome Hugues
Deposited On:29 Aug 2016 14:27

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